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The ACTUAL Difference Between Intel and AMD

Techquickie@techquickie1.5M viewsApr 5, 20225:26
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Visit brilliant.org to get started learning STEM for free, and the first 200 people will get 20% off their annual premium subscription. Learn about Intel's and AMD's contrasting approaches to building CPUs. Leave a reply with your requests for future episodes, or tweet them here: twitter.com ► GET MERCH: lttstore.com ► AFFILIATES, SPONSORS & REFERRALS: lmg.gg ► PODCAST GEAR: lmg.gg ► SUPPORT US ON FLOATPLANE: floatplane.com FOLLOW US ELSEWHERE --------------------------------------------------- Twitter: twitter.com Facebook: @LinusTech Instagram: @linustech TikTok: @linustech Twitch: twitch.tv

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AI OverviewDefault language

The video begins by contrasting AMD and Intel from a practical, user-facing perspective, noting that the everyday performance difference between the two is hard to notice without benchmarks. It then dives into AMD’s chiplet design, explaining that Ryzen CPUs are built from core complexes called CCXs, with Zen 3 featuring CCXs of up to eight cores and Zen 2 using four-core CCXs. The host explains how CCXs sit on CCDs and how Zen 3 uses one CCX per CCD, with up to two CCDs per processor for a total of 16 cores, while Zen 2 can arrange two smaller CCXs per CCD to reach the same 16-core maximum. The discussion introduces Infinity Fabric as AMD’s interconnect that links CCXs and CCDs, highlighting its high speed and the tradeoffs of higher latency and serial data transfer compared to direct core connections. The segment emphasizes the cost and yield benefits of chiplets, arguing that isolating faulty chiplets minimizes waste and that the architecture scales by adding more chiplets rather than redesigning a whole die. Transitioning to Intel, the video explains that Intel still leans toward monolithic designs where cores are adjacent, which yields faster direct communication but comes with drawbacks in yield, scalability, and cost as you scale up. The host then outlines Intel’s response to the chiplet trend through methods like EMIB, a smaller interconnect piece that enables tiles to communicate in parallel with higher bandwidth and lower latency, albeit with limits on total tile count due to thermal constraints. Foveros is introduced as Intel’s chip-stacking approach, though consumer adoption has been limited so far. The narrative concludes that both companies are experimenting with 3D integration and chiplet-based designs but that completely abandoning monolithic designs is unlikely in the near term, especially for budget systems where simpler designs persist. The sponsor segment for Brilliant.org is presented, followed by a recap of how these architectural choices shape performance, scalability, and cost across mainstream products and future Intel lineups like Meteor Lake, which leverage tile-based connectivity via EMIBs. The video ends with a nod to ongoing development and an invitation for viewer input on future topics.

Topics · technology · computing · cpu-architecture

Questions answered

What is a CCX and how does it relate to AMD's Ryzen architecture?
A CCX is a core complex that groups together CPU cores and associated cache. In Ryzen, Zen 3 uses one CCX per CCD with up to two CCDs per processor for as many as 16 cores, while Zen 2 can place two smaller CCXs per CCD to reach the same 16-core maximum.
What are EMIB and Foveros and why do they matter for Intel's approach?
EMIB is a small silicon link that connects tiles on either side to enable parallel data transfer with higher bandwidth and lower latency, while Foveros is a stacking approach that places chips atop one another. Both are ways to implement chiplet-based designs, offering scalability at potentially lower costs but with different practical limitations.